JPS6244541Y2 - - Google Patents

Info

Publication number
JPS6244541Y2
JPS6244541Y2 JP1982098865U JP9886582U JPS6244541Y2 JP S6244541 Y2 JPS6244541 Y2 JP S6244541Y2 JP 1982098865 U JP1982098865 U JP 1982098865U JP 9886582 U JP9886582 U JP 9886582U JP S6244541 Y2 JPS6244541 Y2 JP S6244541Y2
Authority
JP
Japan
Prior art keywords
cap
heat dissipation
ceramic substrate
dissipation fin
square hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982098865U
Other languages
English (en)
Japanese (ja)
Other versions
JPS593554U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1982098865U priority Critical patent/JPS593554U/ja
Publication of JPS593554U publication Critical patent/JPS593554U/ja
Application granted granted Critical
Publication of JPS6244541Y2 publication Critical patent/JPS6244541Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
JP1982098865U 1982-06-30 1982-06-30 半導体装置 Granted JPS593554U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982098865U JPS593554U (ja) 1982-06-30 1982-06-30 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982098865U JPS593554U (ja) 1982-06-30 1982-06-30 半導体装置

Publications (2)

Publication Number Publication Date
JPS593554U JPS593554U (ja) 1984-01-11
JPS6244541Y2 true JPS6244541Y2 (en]) 1987-11-25

Family

ID=30234542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982098865U Granted JPS593554U (ja) 1982-06-30 1982-06-30 半導体装置

Country Status (1)

Country Link
JP (1) JPS593554U (en])

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57107063A (en) * 1980-12-25 1982-07-03 Nec Corp Semiconductor package

Also Published As

Publication number Publication date
JPS593554U (ja) 1984-01-11

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